EDN

FROM EDN EUROPE: Stable PLL synthesises fast clocks

For applications that require a clock with good stability in both long-term (frequency stability) and short-term (phase noise and jitter) parameters, designers will often specify a crystal oscillator.
EDN

Single Clock Generator with Integrated PLL

The AK8110 is a single clock generator IC with an integrated PLL. It can generate either a 36.0 MHz or 49.5 MHz clock from a 27 MHz master clock input frequency.The AK8110 is a single clock generator ...
Electronic Design

Unconventional PLL Uses BTSC Pilot To Generate Master Clock

Multichannel television sound (MTS), better known as Broadcast Television System Committee (BTSC) encoding, is used in many analog cable set-top boxes for TV. The BTSC pilot is at the same frequency ...
Electronic Design

Clock Generator Allows Web Customization

Heralded as the industry’s first web-customizable clock generator, the Si5355/56 eight-output CMOS clock generators are capable of synthesizing four unique, non-integer related frequencies from 1 MHz ...
Design-Reuse

TSMC PLL _ Clock Generator / Clock Synthesizer / Phase-Locked Loop, (Fractional / Integer)

The ARKCHIPS PLL is a versatile and stable general-purpose frequency synthesizer with phase synchronization(de-skew) Phase-Locked Loop (PLL) : feedb ...