IEEE

Integration of Hardware Acceleration Techniques in a Real-Time Framework Using FPGA Devices

Abstract: The ITER International Fusion Experiment Organization is implementing the real-time framework (RTF) to facilitate the development, deployment, and execution of instrumentation and control (I ...
IEEE

Deep Reinforcement Learning Acceleration for Real-Time Edge Computing Mixed Integer Programming Problems

Abstract: In this work, we present the design and implementation of an ultra-low latency Deep Reinforcement Learning (DRL) FPGA based accelerator for addressing hard real-time Mixed Integer ...